1. Field of the Invention
The present invention relates to a semiconductor device including a MOS capacitor formed on a semiconductor substrate.
2. Background Art
Conventional examples of a capacitor element formed on a semiconductor substrate include a MOS capacitor, PIP (Polysilicon-Insulator-Polysilicon) capacitor, and MIM (Metal-Insulator-Metal) capacitor. A PIP capacitor and MIM capacitor each use a material with a higher dielectric constant for a dielectric layer between electrodes.
In some cases, the material may increase the number of manufacturing processes or the process cost. For this reason, a MOS capacitor is often used in a circuit fabricated by a CMOS process, in consideration of compatibility with other components such as a MOS transistor.
Some of conventional MOS capacitors include a p-type semiconductor substrate, an n-type well formed in the p-type semiconductor substrate, an n+ diffusion layer formed in the n-type well, a gate insulating film provided on the n-type well, a gate electrode made of polysilicon or a metal provided on the gate insulating film, a first metal wiring layer provided on the gate electrode and connected through a contact, and a second metal wiring layer provided on the first metal wiring layer and connected to the n+ diffusion layer through a contact (see, e.g., Japanese Patent Laid-Open Publication No. 2002-217304).
With this structure, a capacitance is formed between the gate electrode and p-type semiconductor substrate across the gate insulating film, and the capacitance functions as a MOS capacitor. Since the MOS capacitor has a thin gate insulating film, it has a relatively large capacitance.
As for the CV characteristic of a MOS capacitor with the above-described MOS structure, if a gate voltage “Vg”<0, a depletion layer is formed on a silicon surface immediately below the gate electrode. A depletion layer capacitance generated by the formation of the depletion layer is series-connected to a gate insulating film capacitance. For this reason, a total capacitance “C” decreases.
On the other hand, if 0< the gate voltage “Vg,” electrons floating in the n-type well are moved to the neighborhood of the silicon surface, and thus, the total capacitance “C” becomes equal to the capacitance of the gate insulating film.
As described above, a MOS capacitor has voltage dependence, i.e., the capacitance value varies with a change in applied voltage.
The CV characteristic of a MOS capacitor varies depending on whether the power supply frequency is low or high. This is because if the power supply frequency is high, switching between the on and off states of the MOS capacitor is too rapid to allow sufficient time for accumulation of carriers in an inversion layer, and the MOS capacitor is brought into a state equivalent to one when the inversion layer has no capacitance.
A MOS capacitor as described above is often used in a charge pump circuit which generates a boost power supply, and so on. A charge pump circuit is a circuit which boosts the voltage of a low-voltage power supply and supplies a high voltage to an internal circuit. A MOS capacitor used in such a charge pump circuit has voltage dependence, i.e., the capacitance value varies with a change in the voltage applied to the gate electrode. Accordingly, the boost performance of the charge pump is limited.
The voltage of a MOS capacitor constantly varies due to charge and discharge by the pumping operation of a charge pump circuit. In a channel region of the MOS capacitor, a diffusion layer or well has a high resistance. For this reason, it takes time from when an applied voltage changes to when the capacitance reaches a desired value. Thus, it is necessary to pay sufficient attention to the frequency characteristic of a MOS capacitor as well.